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NandFarm PowerRiser Documentation

Welcome to the official technical documentation repository for the NandFarm PowerRiser ecosystem.

The PowerRiser project is a family of open-source, high-density replacement riser cards engineered specifically for Lenovo Ultra Small Form Factor (USFF) 1-Liter computing nodes. By tapping into the underlying motherboard architecture, these modules break out multiplexed PCIe lanes to expand storage and computing capacity within strict mechanical limits.

Hardware Ecosystem Breakdown​

Select the documentation track that corresponds to your specific host system hardware generation:

1. Tiny5 Platform (M720q / M920q) ➔​

  • Architecture: 8th & 9th Generation Intel Core platforms.
  • Bus Routing: Split native CPU x8 links to the expansion slot and independent PCH x4 links directly to a vertical M.2 slot.
  • Power Requirements: Native passive motherboard power rails.

2. Tiny6 Platform (M90q Gen 1 & Gen 2) ➔​

  • Architecture: 10th & 11th Generation Intel Core platforms.
  • Bus Routing: Preserves native x8 electrical connectivity alongside secondary NVMe expansion, adapted for the redesigned Tiny6 physical chassis mounting logic.
  • Power Requirements: Native passive motherboard power rails.

3. Tiny8 Platform (M90q Gen 3+) ➔​

  • Status: 🚧 In Active Development / Prototyping Phase
  • Architecture: 12th Generation Intel Core platforms and newer.
  • Key Changes: Includes onboard active DC-DC step-down buck regulators to handle Lenovo's shift to a pure 20V power delivery rail, alongside traces routed to combat motherboard lane reversal.

Design Principles​

All hardware modules documented here follow strict operational constraints:

  1. Signal Integrity First: High-frequency PCIe transmission lines are modeled and calculated for precise differential impedance matching ($85\Omega$ or $100\Omega$ targets depending on generation boundaries).
  2. Zero Host Modification: No trace cutting or structural motherboard soldering is required; all modules utilize stock proprietary high-density socket alignments.
  3. Open Hardware: Complete Bill of Materials (BOM), schematics, and production-ready Gerber files are open for public review and independent community implementation.

Community & Contributions​

Found an edge-case bug with a specific NVMe controller or host BIOS revision?

  • Please log your drive configurations or hardware issues directly in our GitHub Repository tracking loops.
  • For hardware availability or production run tracking, visit the official storefront links listed on the Products Page.